Llama.cpp hits 6.8x KV reduction on AMD

This integration is a category-defining moment for the ROCm ecosystem, proving that AMD hardware can achieve world-class LLM efficiency through native optimization rather than just following CUDA's lead. Native HIP kernels perform GPU-side cache compaction to bypass CPU bottlenecks, while the C/ggml TriAttention integration provides a "no-Python" path for production-grade inference. Performance metrics remain robust with negligible speed overhead and perfect NIAH results, specifically targeting RDNA3 hardware like the RX 7900 XTX for long-context local LLM tasks.