LocalLLaMA weighs third GPU via M.2 lanes

The thread’s signal is that x4 links can be good enough for inference-oriented expansion, but the setup quickly becomes an infrastructure engineering problem.

• –PCIe 4.0 x4 tops out around 7.9 GB/s, so it is viable for many inference paths but can pinch tensor-parallel or heavy prefill traffic.
• –A third GPU used mainly for VRAM and KV cache can still beat CPU+RAM offload by reducing host-device shuttling.
• –Motherboard lane sharing (chipset vs CPU lanes) and riser/Oculink stability often matter more than theoretical slot width.
• –Several commenters point toward PCIe switch hardware as the cleaner long-term path once you move beyond 2-3 GPUs.